Productivity Unlocked

Drive chip design productivity through analytics, data processing & AI technologies

Overview

Logarithm Labs: #MooreWithLess
Logarithm Labs' mission is to help chip design teams be more productive and do more meaningful work. Both founders met at Google where we got to witness firsthand how modern software is developed, and how automation and visibility into your development flow can do wonders. We be... Read More

Is Lack of Visibility Hurting Your Design Team’s Productivity?
Chip design is tough work. Design teams are under tremendous pressure to deliver the highest possible quality in the shortest possible time. They are also under tremendous pressure to be more productive. This means they need better tools and better processes to be able to do a better job... Read More

Primary Challenges to Getting Better Visibility Across Your Chip Design Flows
The best way to get an end-to-end view of how your designs are progressing is to get all the required data and metrics in the right format in a centralized place. In our previous blog, we identified 3 challenges that make this hard to do:1. Getting the right data... Read More

Product Features & Capabilities

Why Automation Is Needed To Enable Better Visibility For Design Managers
The design of chips is an extremely complex process. It is challenging for design teams to gain end-to-end visibility into the ground truth of their design. This makes it hard to make data-driven decisions, to know where to focus the team’s efforts, and to be as productive as possible. A big part... Read More

Increasing Visibility of Your Design Flows With Logarithm Labs
Chip design is becoming a complex and highly iterative process. This is due in part to the increasing integration density of chips. The increasing number of chip ‘cells’ (transistors, standard cells, memories, IP blocks etc.) and the corresponding increase in interconnects between chip cells make... Read More

Logarithm Labs Product Features and Capabilities
Managers and key decision makers are forced today to make decisions using qualitative, stale, and subjective data. This is because key design metrics are trapped in logs, reports, and other repositories, making them hard to access and use. Logarithm Labs has simplified the process of collecting, ... Read More

Design & Verification

Enabling Better Designs Through Linting and Formal Verification Metrics
As designs get more complex and competitive pressures in the semiconductor space grow, the role of RTL Linters and Formal Verification is becoming more critical. As designs move into later stages, the value and ROI goes up as more and more critical bugs are found and eliminated. However, these to... Read More

The Critical Role of Design Verification
As the complexities of modern digital ASICs and SoCs continue to grow, so too do the challenges of design verification and validation. For each design engineer, the typical semiconductor design team has 3 to 5 times as many verification engineers. These verification teams are tasked with ensuring... Read More

Design Verification Automation Using Logarithm Labs
Manual wading through error signatures, ad-hoc status updates, and metrics roll-ups for weekly review meetings pull engineers away from their core tasks and add significant delays to the design verification process. However, these metrics are critical for key decision makers to understand design ... Read More

Assessing Quality of IP Using Logarithm Labs
Digital IC IP reuse has become an important topic over the past few years as the complexity of ASIC and SoC designs continues to grow exponentially. The "Quality of IP" is a critical question that has become harder to answer, in a large part due to the various design and verification me... Read More

Synthesis & Backend

Faster Quality of Silicon (QoS) Calculations Using Logarithm Labs
Quality of Silicon (QoS) indicates the success of a chip design and its readiness for silicon. Typical metrics measured to calculate include area, power, clock speeds, design rule violations, etc. which are generated by EDA tools. Getting the required metrics together is currently a... Read More

Project Management & Collaboration

Coordination and Visibility Challenges In Design Verification
In our previous blog, we outlined the critical role of verification in chip design. In order for verification teams to be productive, a variety of coordination and communication related challenges need to be addressed. For example, the design process is typically divided into severa... Read More

Assessing Quality of IP Using Logarithm Labs
Digital IC IP reuse has become an important topic over the past few years as the complexity of ASIC and SoC designs continues to grow exponentially. The "Quality of IP" is a critical question that has become harder to answer, in a large part due to the various design and verification me... Read More

Faster Quality of Silicon (QoS) Calculations Using Logarithm Labs
Quality of Silicon (QoS) indicates the success of a chip design and its readiness for silicon. Typical metrics measured to calculate include area, power, clock speeds, design rule violations, etc. which are generated by EDA tools. Getting the required metrics together is currently a... Read More

Cloud, Big Data, and AI

What is Big Data in Chip Design?
While the hype around the "Big Data" buzzword has settled down a bit, the amount of data generated during chip design certainly fits the bill. Nowadays, TBs of data get generated during each tapeout, especially at lower process nodes. This presents both challenges and opportunities for ... Read More