Quality of Silicon (QoS) indicates the success of a chip design and its readiness for silicon. Typical metrics measured to calculate include area, power, clock speeds, design rule violations, etc. which are generated by EDA tools.
Getting the required metrics together is currently a manual, time-consuming and subjective process. Design teams need to:
- Read through the summary or full reports generated by EDA tools to find the key QoS numbers.
- Manually calculate the QoS metrics such as defect density, average and relative DRC and LVS counts, and errors per gate.
- Trim down the data into a format that is more useful.
- Store the QoS data in a centralized database.
- Visualize the data in dashboards and reports.
As a result, design teams today are stuck using either qualitative, stale, and subjective data or engineering intuition to make decisions on QoS. Because of the manual nature of these tasks, there isn’t continuous monitoring of these metrics.
Logarithm Labs' product can automate the parsing and extraction of QoS metrics from reports and logs. Designers can use pre-built or customized parsers to push the desired metrics into a central staging area. Our product supports the following capabilities:
- Parse and transform logs and reports to collect relevant metrics and metadata.
- Collect the relevant data into a central database.
- Transform and compute the desired metrics.
- Store the metrics in a central database.
- Schedule collectors and transformers to run routinely and deliver the metrics to the central database.
- Support drill-down and roll-up of the collected metrics.
- Support interactive visualizations of the collected metrics.
In short, Logarithm Labs' product enables chip design teams to spend more time on their design tasks and less time on non-core tasks such as collecting, parsing, transforming, and storing key metrics.
To learn more about how our solution can help, please reach out to us at firstname.lastname@example.org.